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Hao Geng
Assistant Professor
Graduated School: Chinese University of Hong Kong, China
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Office: 3-332, SIST Building
Homepage: https://true-genghao.github.io/genghao/
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Research Area: AI for EDA, Computational Lithography, Design Space Exploration, Design for Manufacturing
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Currently, Dr. Hao Geng is a tenure-track Assistant Professor at ShanghaiTech University. Prior to that, he got Ph.D. in Computer Science and Engineering from The Chinese University of Hong Kong (CUHK) in 2021. Previously, he received M.Sc. from Imperial College London in 2016, and M.Eng. from the University of Science and Technology of China in 2015.

Prof. Geng has been working on some very important and challenging problems in electric design automation (EDA), which is a crucial interdisciplinary area to further extend Moore’s Law. In particular, he is currently concentrating on some emerging machine learning techniques for EDA. He has conducted research in AI for chip design space exploration, design for manufacturability and computational lithography. He has published over 50 papers at IEEE Trans. on CAD, DAC, ICCAD , DATE and ASPDAC which are at CCF-A rank or top-tier EDA conference. He has received several best paper award nomonations from DAC25, DAC24, ICCAD25 and ASPDAC19. Now Prof. Geng serves as a reviewer of many journals like TCAD, TCAS-I, ICCAD, TCAS-II, ASPDAC, TODAES, and JVLSI.


  • Name：Yuyang Chen
    Position：Postgraduate Student
    Duration：1st Year
    Email：chenyy@shanghaitech.edu.cn
  • Name：Donger Luo
    Position：Postgraduate Student
    Duration：1st Year
    Email：luode22@shanghaitech.edu.cn

Spring 2023    EE215A    VLSI Design Automation

Fall     2022    CS101       Algorithms and Data Structures




  • 1. Yiwen Wu*, Yuyang Chen*, Shuo Yin, Nan Wang, Tao Wu, Xuming He, Hao Geng#, Jingyi Yu#, LVM-MO: A Large Vision Model Pioneer for Full-Chip Mask Optimization, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025. (Best Paper Award Nomination),
  • 2. Yuyang Chen*, Yiwen Wu*, Jingya Wang, Tao Wu, Xuming He, Jingyi Yu#, Hao Geng#, LLM-HD: Layout Language Model for Hotspot Detection with GDS Semantic Encoding, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024 (Best Paper Award Nomination),
  • 3. Zhen Wang*, Hongquan He*, Tao Wu, Xuming He, Qi Sun, Cheng Zhuo, Bei Yu, Jingyi Yu#, Hao Geng#, LMLitho: A Large Vision Model-Driven Lithography Simulation Framework, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025,
  • 4. Donger Luo*, Tianyi Li*, Xinheng Li, Qi Sun, Cheng Zhuo, Bei Yu, Jingyi Yu, Hao Geng#, LLM-Augmented Multi-Modal Fusion for SoC Design Space Exploration, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025,
  • 5. Liuke Wang*, Shenshuo Yao*, Shihan Wang, Zhen Wang, Zicheng Huang, Jingyi Yu, Hao Geng#, When Semi-Supervised LVM Meets Frequency-Based Critical Layout Pattern Selection, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025,
  • 6. Donger Luo, Qi Sun, Xinheng Li, Cheng Zhuo, Bei Yu, Hao Geng#, From Flatland to Forest: Exploring Pareto-optimal Design through RTL Hierarchy Trees, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025,
  • 7. Kai Ma, Zhen Wang, Hongquan He, Qi Xu, Tinghuan Chen, Hao Geng#, LMM-IR: Large-Scale Netlist- Aware Multimodal Framework for Static IR-Drop Prediction, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025,
  • 8. Donger Luo*, Qi Sun*, Xinheng Li, Chen Bai, Bei Yu, Hao Geng#, Knowing The Spec to Explore The Design via Transformed Bayesian Optimization, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024,
  • 9. Donger Luo, QI SUN, Qi Xu, Tinghuan Chen and Hao Geng#, Attention-Based EDA Tool Parameter Explorer: From Hybrid Parameters to Multi-QoR metrics, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Valencia, Spain, Mar. 25–27, 2024,
  • 10. Hongquan He, Guowen, Qi Sun Kuang, Hao Geng#, PoLM: Point Cloud and Large Pre-trained Model Catch Mixed-type Wafer Defect Pattern Recognition, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Valencia, Spain, Mar. 25–27, 2024,
  • 11. Hao Geng, Tinghuan Chen, Yuzhe Ma, Binwu Zhu, Bei Yu#, PTPT: Physical Design Tool Parameter Tuning via Multi-Objective Bayesian Optimization, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023, vol. 42, no. 01, pp. 178–189
  • 12. Hao Geng, Yuzhe Ma, Qi Xu, Jin Miao, Subhendu Roy, Bei Yu#, High-Speed Adder Design Space Explo- ration via Graph Neural Processes, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022, vol. 41, no. 8, pp. 2657–2670
  • 13. Hao Geng, Haoyu Yang, Lu Zhang, Fan Yang, Xuan Zeng, Bei Yu#, Hotspot Detection via Attention-based Deep Layout Metric Learning, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022, vol. 41, no. 8, pp. 2685–2698
  • 14. Hao Geng, Wei Zhong, Haoyu Yang, Yuzhe Ma, Joydeep Mitra, Bei Yu#, SRAF Insertion via Supervised Dictionary Learning, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2020, vol. 39, no. 10, pp. 2849-2859 (ASPDAC Best Paper Award Nomination)
  • 15. Hao Geng, Qi Xu, Tsung-Yi Ho, Bei Yu#, PPATuner: Pareto-driven Tool Parameter Auto-tuning in Physical Design via Gaussian Process Transfer Learning, ACM/IEEE Design Automation Conference (DAC), 2022, pp. 1237–1242
  • 16. Hao Geng, Fan Yang, Xuan Zeng, Bei Yu#, When Wafer Failure Pattern Classification Meets Few-shot Learning and Self-Supervised Learning, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2021,
  • 17. Qi Xu, Hao Geng#, Song Chen#, Bo Yuan, Cheng Zhuo, Yi Kang, Xiaoqing Wen#, GoodFloorplan: Graph Convolutional Network and Reinforcement Learning Based Floorplanning, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022, vol. 39, no. 10，pp. 3492 - 3502
  • 18. Qi Xu*, Hao Geng*, Tianming Ni, Song Chen, Bei Yu, Xiaoqing Wen#, Fortune: A New Fault-Tolerance TSV Configuration in Router-based Redundancy Structure, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022, vol. 41, no. 10, pp. 3182–3187
  • 19. Su Zheng, Hao Geng#, Chen Bai, Bei Yu#, Martin Wong#, Boosting VLSI Design Flow Parameter Tuning with Random Embedding and Multi-objective Trust-region Bayesian Optimization, ACM Transactions on Design Automation of Electronic Systems (TODAES) , 2023,