The Era of Domain Specific Processor Architectures

Release Time:2023-09-19Number of visits:136

Speaker:  Georgios Keramidas, Aristotle University of Thessaloniki,

Time:       10:00-11:00 am, Sept.20

Location: SIST 1A200

Host:        Rui Fan



The rapid advancement of artificial intelligence (AI) and multimedia technologies has led to a paradigm shift in computing, giving rise to a new era of domain-specific processor architectures and accelerators tailored for edge computing environments. In this tutorial, we will provide an overview of the key concepts and developments in this transformative field starting from the basic principles of CMOS technology that actually led us to the so-called “end of Moore′s Law” all the way towards the domain-specific processor architectures and accelerators. We will present various HW-SW co-design techniques that are able to enable real-time AI inference and training on edge devices.





Dr. Georgios Keramidas received his PhD degree in Electrical and Computer Engineering from the University of Patras, Greece. He is currently an Assistant Professor at the School of Informatics at the Aristotle University of Thessaloniki. He has published more than 85 papers, two books, three book chapters and he also holds 17 US and Chinese patents (3 more patents are under evaluation). His work received more than 1235 citations (h-index: 17, i10-index: 26) and a best-paper award During the last years, Dr. Keramidas has participated in more than 10 collaborative research projects funded by European Commission and in five national projects either as project coordinator, technical coordinator, work packager leader, or as senior researcher. He is also the technical coordinator of an industry-academia technology transfer project (SMART4ALL) funded by the European Commission. Before joining the Aristotle University, Dr. Keramidas spent almost 11 years in industry in the position of Chief Scientific Officer of Think Silicon S.A. working in embedded, ultra-low power multithreaded Graphics Processing Units (GPUs). He was also responsible for running the funded projects of the company and for expanding the patent portfolio of the company. Dr. Keramidas continues to work in the company as technology consultant. Prof. Keramidas has served as Program Chair in 3 international conferences (FPL'21, ISVLSI21, ARC 2018) and as a TPC Member in many conferences (DATE, FPL, ISVLSL, SAMOS, CITS, CCCI, ISOED). He serves as evaluator and as innovation expert in European Commission (CT-EX2013D154568). Dr. Keramidas is a regular reviewer in many journals/transactions, he received an “Outstanding reviewer award from the Microprocessors and Microsystems (MICPRO) journal, and he is a member of the HiPEAC European Network of Excellence.