Domain-specific spintronic systems through system-technology co-design

Release Time:2023-01-11Number of visits:3092

Speaker Xuanyao FongNational University of Singapore

Time:       10:30-11:30am , January 13th

Zoom Meeting : Zoom No.: 882 0483 7890   Password: 602439

Zoom Link:

Host:      Zhifeng ZHU



Advancements in machine learning has led to artificial intelligence (AI) algorithms that are capable of achieving human-like performance in many cognitive tasks suitable for application in the Internet of Things. As a consequence of the burgeoning demand, the advancement of AI algorithms have far outstripped technological improvements, which has resulted in Moore’s Law-like increase in power consumption and needs to be urgently addressed by designing energy efficient hardware for executing AI algorithms. Spintronic device technologies that leverage on magnetism, electron spin and the magnetoresistance effect can have interesting device architectures that are suitable for implementing AI hardware accelerators.


In this talk, we will discuss spintronic device concepts based on spin-torque nano oscillators, domain-wall motion, skyrmions and the AI hardware accelerators that can be implemented using them. System-technology co-design of these hardware accelerators will be presented to show how intrinsic properties of spintronic devices enable them to perform computations that matches the needs of corresponding AI algorithms, and achieve energy efficiency. Finally, we will briefly discuss prospects, opportunities and the immediate design challenges that need to be addressed to push the envelope of energy efficiency in spintronic hardware accelerators for domain-specific computing.



Dr. Kelvin Fong Xuanyao received his B.Sc. with distinction and Ph.D. degrees in Electrical Engineering from Purdue University, West Lafayette, IN, USA in 2006 and 2014, respectively. His primary research interests include robust memory design methodologies for post-CMOS technologies, post-CMOS circuit architectures, and device-circuit-architecture co-design for nano-scale CMOS and post-CMOS technologies.


Since December 2016, Dr. Kelvin Fong is an Assistant Professor in the Department of Electrical & Computer Engineering at the National University of Singapore. He worked as an Intern Engineer with the Global Circuits Group (Bulldozer) at Advanced Micro Devices, Inc. Boxborough Design Center in Massachusetts from January 2007 to August 2007. He was a Postdoctoral Research Assistant supervised by Prof. Kaushik Roy in the School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN from September 2014 to May 2015. He then joined the Institute of Microelectronics at the Agency for Science, Technology and Research (A*STAR), Singapore, as a Research Scientist in June 2015.Dr. Fong was the recipient of the “AMD Design Excellence Award” at Purdue in 2008.