Prof. Pingqiang Zhou’s research group contributes to DATE 2019

  Recently, one paper of Prof. Pingqiang Zhou’s research group was accepted by the 22nd Design, Automation and Test in Europe (DATE 2019) conference (Paper title: Optimizing the Energy Efficiency of Power Supply in Heterogeneous Multicore Chips with Integrated Switched-Capacitor Converters).

Design, Automation and Test in Europe (DATE)、Design Automation Conference (DAC)、International Conference on Computer Aided Design (ICCAD), as well as Asia and South Pacific Design Automation Conference (ASPDAC) are the four top conference in the field of Electronics Design Automation (EDA). The DATE 2019, to be held in Florence, Italy, received 834 submissions from around the world, among which 202 papers were selected for regular presentation and the submission rate is 24%. The papers of regular presentation include two types: short presentation (15 min) and long presentation (30 min). The latter accounts for no more than 40%.

  The first author is a master student, Wang Lu, in Prof. Pingqiang Zhou research group. Other collaborators include a Ph.D. student Wang Leilei, a graduated master student Shang Dejia in Prof. Pingqiang Zhou research group and Prof. Zhuo Cheng in the Zhejiang University (former Intel Oregon Research Laboratory Researcher). The topic of this paper is from the Intel Research Lab. The key point is to improve the power efficiency of power supply in heterogeneous multicore chips and optimize the switching-capacitor converter (SCC) resource, including the capacitance resource allocation and converter ratio selection for SCCs. The experimental results show that the approach can improve the power efficiency of the power supply by 9%-13%.

    Since 2018, Prof. Pingqiang Zhou’s research group has published nearly 10 high-level papers in mainstream international journals (such as TCAD, Integration, and the VLSI Journal) and conferences (such as DAC, DATE, etc.). These papers provide a range of solutions for intelligent, energy-efficient, and reliable data communication and energy supply in heterogeneous multi-core processors.