Energy-efficient integrated circuits for machine vision and 3D graphics
VLSI digital signal processing systems
Dr. Lou received the B.Eng. degree in Electronic Information Technology and Instrumentation from Zhejiang University (ZJU), China, in 2010 and M.Sc. degree in System-on-Chip Design from Royal Institute of Technology (KTH), Sweden, in 2012 and PhD degree in Electrical and Electronic Engineering from Nanyang Technological University (NTU), Singapore, in 2016. Then he joined VIRTUS, IC Design Centre of Excellence at NTU as a research scientist. In Mar. 2017, he joined the School of Information Science and Technology, ShanghaiTech University, Shanghai, China, as an assistant professor and establish the VLSI Signal Processing Lab. His research interests include energy-efficient integrated circuits for machine vision and 3D graphics, and other VLSI digital signal processing systems Dr. Lou has published more than 40 technical papers in top journals and conferences such as IEEE TCAS-I, TIP, TPAMI and CICC. Dr. Lou is a senior member of the IEEE, and serves as an Associate Editor of IEEE TCAS-II.
1. H. Wang, W. Zhou, X. Zhang and X. Lou*, “A Block PatchMatch-based Energy-resource Efficient Stereo Matching Processor on FPGA”, IEEE Transactions on Circuits and Systems I (TCAS-I), accepted.
2. J. Geng, S. Wang, Q. Liu and X. Lou*, “Multi-Level Time-Frequency Bins Selection for Direction of Arrival Estimation Using a Single Acoustic Vector Sensor”, IEEE/ACM Transactions on Audio Speech and Language Processing (TASL), accepted.
3. Z. Liao, D. Jiang, X. Liu, A. Velten, Y. Ha and X. Lou*, “FPGA Accelerator for Real-Time Non-Line-of-Sight Imaging”, IEEE Transactions on Circuits and Systems I (TCAS-I), vol. 69, no. 2, pp. 721-734, Feb. 2022.
4. D. Jiang, X. Liu, J. Luo, Z. Liao, A. Velten and X. Lou*, “Ring and Radius Sampling Based Phasor Field Diffraction Algorithm for Non-Line-of-Sight Reconstruction”, IEEE Transactions on Pattern Analysis & Machine Intelligence (TPAMI), early access.
5. X. Zhang, L. Zhang and X. Lou*, “A Raw Image-based End-to-end Object Detection Accelerator using HOG Features”, IEEE Transactions on Circuits and Systems I (TCAS-I), vol. 69, no. 1, pp. 322-333, Jan. 2022.
6. H. Wang, W. Zhou, X. Zhang and X. Lou*, “A 39pJ/label 1920x1080 165.7 FPS Block PatchMatch Based Stereo Matching Processor on FPGA,” accepted, IEEE Custom Integrated Circuits Conference (CICC), 2022.
7. L. Zang, W. Zhou, X. Zhang and X. Lou*, “An End-to-end Computer Vision System Architecture,” accepted, IEEE Int. Symp. Circuits Syst. (ISCAS), 2022.
8. J. Geng, S. Wang and X. Lou*, “A Slide-save Based Framework for Multi-source DOA Extraction with Spatial Closely Separated Sources,” accepted, International Conference on Acoustics, Speech, & Signal Processing (ICASSP), 2022.