Xin Lou, Assistant Professor

The publisher:王雪Release time:2018-08-20浏览次数:32

Xin Lou, Assistant Professor

Tel:  (021) 20685375
Email: louxin@@shanghaitech.edu.cn
Office: Room 1D-301E, SIST Building
Major: EE
Website:
Xin Lou Research Group Recruitment (Click Here)

RESEARCH INTERESTS

Digital FIR filter design and implementation

Energy-efficient VLSI digital signal processing circuits and systems 

Smart vision circuits and systems


BIOGRAPHY

Dr. Lou obtained his bachelor’s degree in Electronic Science and Technology from Zhejiang University (ZJU), China, in 2010 and Master’s degree in System-on-Chip Design from Royal Institute of Technology (KTH), Sweden, in 2012 and PhD degree in Electrical and Electronic Engineering from Nanyang Technological University (NTU), Singapore, in 2016. Then he joined VIRTUS, IC Design Centre of Excellence at the same university as a research scientist. In Feb. 2017, Dr. Lou joined the School of Information Science and Technology, ShanghaiTech University as an assistant professor, PI.


SELECTED PUBLICATIONS

1.Chen, Wangqian, Mo Huang,and Xin Lou. Design of Sparse FIR Filters With Reduced Effective Length. IEEE Transactions on Circuitsand Systems I: Regular Papers (2018).

2.Chen, Wangqian, Mo Huang,and Xin Lou. A Branch-and-Bound Algorithm with Reduced Search Space for Sparse Filter Design. 2018 IEEE Asia Pacific Conference on Circuitsand Systems (APCCAS). IEEE, 2018.

3.Li, S., Ye, W., Liang, H., Pan, X., Lou, X., and Zhao, X. (2018, May). K-SVD Based Denoising Algorithm for DoFP Polarization Image Sensors. In Circuitsand Systems (ISCAS), 2018 IEEE International Symposium on (pp. 1-5). IEEE.

4.X. Lou*, Y. J. Yu and P. K. Meher, LowerBound Analysis and Perturbation of Critical Path for Area-Time EfficientMultiple Constant Multiplications, IEEE Transactions on Computer-Aided Designof Integrated Circuits and Systems, vol 36, no. 2, pp. 313-324, Feb. 2017.

5.P.K. Meher, and X. Lou*, Low-Latency,Low-Area, and Scalable Systolic-Like Modular Multipliers for GF(2^m) Based onIrreducible All-One Polynomials, IEEE Transactions on Circuits and Systems I,vol 64, no. 2, pp. 313-324, Feb. 2017.

6.X. Lou*, Y. J. Yu and P. K. Meher, Analysisand Optimization of Product-Accumulation Section for Efficient Implementationof FIR Filters, IEEE Transactions on Circuits and Systems I, vol 63, no. 10,pp. 1701-1713, Oct. 2016.

7.X. Lou*, Y. J. Yu and P. K. Meher, Fine-GrainedCritical Path Analysis and Optimization for Area-Time Efficient Realization ofMultiple Constant Multiplications, IEEE Transactions on Circuits and SystemsI, vol 62, no. 3, pp. 863-872, Mar. 2015.

8.X. Lou*, Y. J. Yu and P. K. Meher, NewApproach to the Reduction of Sign-extension Overhead for EfficientImplementation of Multiple Constant Multiplications, IEEE Transactions onCircuits and Systems I, vol 62, no. 11, pp. 2695-2705, Nov. 2015.