Pingqiang Zhou, Assistant Professor

The publisher:王雪Release time:2018-08-20浏览次数:35

Pingqiang Zhou, Assistant Professor

Tel:  (021) 20685084
Office: Room 1D-401D, SIST Building
Major: EE
Pingqiang Zhou Research Group Recruitment (Click Here)


Integrated circuits and systems

Computer architecture

Machine learning


Prof. Pingqiang Zhou received the M.E. degree from Tsinghua University, Beijing, China, in 2007, and a from the University of Minnesota, Minneapolis, MN, USA, in 2012. He has been an Assistant Professor with the School of Information Science and Technology at ShanghaiTech University since July 2013. Prior to joining ShanghaiTech, he was with the IBM T. J. Watson Research Center, Yorktown Heights, NY, USA, as a research intern, in 2011, and with the University of Minnesota as a Post-Doctoral Researcher from 2012 to 2013. He was also with the Department of Electrical Engineering & Computer Sciences, University of California, Berkeley as a visiting scholar from Jan 2015 to June 2015.
Dr. Zhou is the recipient of an Outstanding Master's Thesis Award from Tsinghua University, Beijing, China and the James Zeese Fellowship for his Ph.D. Thesis work from the University of Minnesota. He won the Intel/Helic/CICC Student Scholarship Award for top student papers at the 2011 IEEE Custom Integrated Circuits Conference and a Best Paper Award Nomination at the 2010 Asia/South Pacific Design Automation Conference. Dr. Zhou is the invited referee for a number of top journals such as TCAD, TVLSI and TODAES in the EDA area, and serves as the TPC member for top conferences such as DAC, ICCAD and ASP-DAC.


1.Lu Wang, Leilei Wang, Dejia Shang, Cheng Zhuo and Pingqiang Zhou, Optimization of switched-capacitor DC-DC converters in heterogeneous multicore systems. Proceedings of the Design, Automation, and Test in Europe Conference, 2019.

2.Li, Y., Zhuo, C., and Zhou, P. (2018). A Cross-Layer Framework for Temporal Power and Supply Noise Prediction. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

3.Gao, W., Qian, Z., and Zhou, P. (2018). Reliability-and performance-driven mapping for regular 3D NoCs using a novel latency model and Simulated Allocation. Integration.

4.Liu, Y., Chen, X., Kadambi, D., Bari, A., Li, X., Hu, S., and Zhou, P. (2018). Dependable Visual Light-Based Indoor Localization with Automatic Anomaly Detection for Location-Based Service of Mobile Cyber-Physical Systems. ACM Transactions on Cyber-Physical Systems, 3(1), 5.

5.Cai, X., Yin, J., and Zhou, P. (2018). An orchestrated NoC prioritization mechanism for heterogeneous CPU-GPU systems. Integration.

6.Liu, X., Sun, S., Li, X., Qian, H., & Zhou, P. (2017). Machine learning for noise sensor placement and full-chip voltage emergency detection. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36(3), 421-434.

7.Wang, L., & Zhou, P. (2016, March). Leakage power reduction in multicore chips via online decap modulation. In Semiconductor Technology International Conference (CSTIC), 2016 China (pp. 1-3). IEEE.

8.Xiaochen Liu, Shupeng Sun, Pingqiang Zhou, Xin Li and Haifeng Qian, A Statistical Methodology for Noise Sensor Placement and Full-Chip Voltage Map Generation, Proceedings of the ACM/EDAC/IEEE Design Automation Conference, pp. 1-6, 2015.

9.Zhou, P., Paul, A., Kim, C. H., & Sapatnekar, S. S. (2014). Distributed on-chip switched-capacitor DC–DC converters supporting DVFS in multicore systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 22(9), 1954-1967.

10.Yin, J., Zhou, P., Sapatnekar, S. S., & Zhai, A. (2014, May). Energy-efficient time-division multiplexed hybrid-switched noc for heterogeneous multicore systems. In Parallel and Distributed Processing Symposium, 2014 IEEE 28th International (pp. 293-303). IEEE.

11.Zhou, P., Yuh, P. H., & Sapatnekar, S. S. (2012). Optimized 3D network-on-chip design using simulated allocation. ACM Transactions on Design Automation of Electronic Systems (TODAES), 17(2), 12.

12.Zhou, P., Ma, Y., Li, Z., Dick, R. P., Shang, L., Zhou, H., ... & Zhou, Q. (2007, November). 3D-STAF: scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits. In Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design (pp. 590-597). IEEE Press.