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Energy Efficient Neural Networks on Heterogeneous Hardware
Date:2015/7/20     Browse:564

Speaker: Yu Wang

Time: July 20th, 9:00-10:00 am

Location: Room 220, Building 8, Yueyang Road Campus

Abstract:

The world is experiencing a data revolution to discover knowledge in big data. Large-scale neural networks are one of the mainstream tools of big data analytics. Processing big data with large-scale neural networks includes two phases: the operation phase and the training phase. The energy efficiency (power efficiency) is one of the major considerations of the operation phase. Meanwhile, huge computing power is required to support the training phase. In this talk, Dr. Wang will mainly introduce energy efficient implementation of neural networks’ operation phase by taking advantage of the emerging memristor (ReRAM) technique, together with some progress on FPGA based CNN implementation and GPU based DNN training.

Bio:

Dr. Yu Wang is an Associate Prof. in EE Department, Tsinghua University. Dr. Wang's research mainly focuses on brain inspired computing, application specific hardware computing (especially on the Brain related problems), parallel circuit analysis.

Dr. Wang has authored and coauthored over 130 papers in refereed journals and conferences, including nearly 20 IEEE/ACM journals and many papers in important conferences, such as DAC /DATE /FPGA /ISCA /HPCA. He is the recipient of IBM X10 Faculty Award in 2010, Best Paper Award in ISVLSI 2012, Best Poster Award in HEART 2012, and 6 Best Paper Nomination in ASPDAC/CODES/ISLPED. He serves as the Associate Editor for IEEE Trans on CAD, Journal of Circuits, Systems, and Computers. He is the TPC Co-Chair of ICFPT 2011, Finance Chair of ISLPED 2012-2015, and serves as TPC member in many important conferences (DAC/ICCAD/DATE/ASPDAC, FPGA, ISLPED, etc).

                                                                                                                       

SIST-Seminar 15034