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Short Course on Recent Advances of High-level Synthesis.
Date: 2017/7/5             Browse: 372

Speaker:   Prof. Deming Chen

Time:         July 5, 2:00pm-5:00pm

Location:  Room 1A-200  , SIST Building

Inviter:    Prof. Yajun Ha


The Internet has become the most pervasive technology, which has infiltrated every aspect of our lives. It is predicted that there will be 50 billion devices connected in the Internet of Things (IoT) by 2020. This explosion of devices naturally demands low design cost and fast time-to-market for producing highly energy-efficient ICs. Meanwhile, big data accumulated through these devices need to be processed timely, which demands high processing power under energy constraints for data centers.  Such substantial demands on high performance and energy efficiency in different markets would lead to continued increases of IC complexity and capacity. Given all these new trends, a significant problem facing the industry is that the design productivity for complex ICs has been lagging behind. High-level synthesis (HLS) has been touted as a solution to this problem, as it can significantly reduce the number of man hours required for a design by raising the level of design abstraction. In this short course, Prof. Deming Chen will first provide an overview of high-level synthesis, its promises and challenges, and some popular algorithms. Then, he will introduce the most recent advances of high-level synthesis in the areas of circuit reliability, verification, hardware security, deep neural networks, and hardware/software co-design.  


Dr. Deming Chen obtained his BS in computer science from University of Pittsburgh, Pennsylvania in 1995, and his MS and PhD in computer science from University of California at Los Angeles in 2001 and 2005 respectively. He worked as a software engineer between 1995-1999 and 2001-2002. He joined the ECE department of University of Illinois at Urbana-Champaign (UIUC) in 2005 and has been a full professor in the same department since 2015. He is a research professor in the Coordinated Science Laboratory and an affiliate professor in the CS department. His current research interests include system-level and high-level synthesis, computational genomics, GPU and reconfigurable computing, and hardware security. He has given more than 80 invited talks sharing these research results worldwide. Dr. Chen is a technical committee member for a series of top conferences and symposia on EDA, FPGA, low-power design, and VLSI systems design. He also served as Program or General Chair, TPC Track Chair, Session Chair, Panelist, Panel Organizer, or Moderator for some of these conferences. He is an associated editor for several IEEE and ACM journals. He received the NSF CAREER Award in 2008, and six Best Paper Awards for ASPDAC'09, SASP'09, FCCM'11, SAAHPC'11, CODES+ISSS'13, and ICCAD'15. He received the ACM SIGDA Outstanding New Faculty Award in 2010, and IBM Faculty Award in 2014 and 2015. He is the Donald Biggar Willett Faculty Scholar. He is included in the List of Teachers Ranked as Excellent in 2008. He was involved in two startup companies previously, which were acquired. In 2016, he co-founded a new startup, Inspirit IoT, Inc., for design and synthesis for machine learning targeting the IoT industry. Inspirit IoT recently received an NSF SBIR (Small Business Innovation Research) Award from the US government. 

                                                                                                                                                                                                                                      SIST-Seminar 17033