Machine Learning and Its FPGA Acceleration

发布时间:2019-05-21浏览次数:248

Speaker:    Prof. Deming Chen

Time:        13:30-17:45, May 29

Location:    SIST 1A-200

Host:         Prof. Yajun Ha

Short Course I: Machine Learning Fundamentals.

(Two hours with 5 minutes break in the middle)

Part I: General view of machine learning, machine learning models, supervised vs unsupervised, training vs inference, unstructured vs structured data, artificial neural network (ANN). 

Part II:  Deep neural network (DNN), forward propagation, backpropagation, overfitting and regularization, vanishing gradient problem, convolutional neural network (CNN), recurrent neural network (RNN), training for DNN.

3:30pm-3:45pm: 15 mins break

Short Course II: DNN Inference Acceleration with FPGAs

(Two hours with 5 minutes break in the middle)

Part I: Challenges of developing FPGA accelerators for DNN, high-level synthesis (HLS), parallelism in the DNN, FPGA design in Roofline model, computation optimization, DNN IPs, case studies for LRCN for video content understanding and GoogleNet for facial recognition.

Part II: Latest research results, DNNBuilder, building DNNs with low bitwidth, cloud-DNN, DNN/FPGA co-design, case study for object detection and tracking.

Bio:

Dr. Deming Chen obtained his BS in computer science from University of Pittsburgh, Pennsylvania in 1995, and his MS and PhD in computer science from University of California at Los Angeles in 2001 and 2005 respectively. He joined the ECE department of University of Illinois at Urbana-Champaign in 2005 and has been a full professor in the same department since 2015. He is a research professor in the Coordinated Science Laboratory and an affiliate professor in the CS department. His current research interests include system-level and high-level synthesis, machine learning, GPU and reconfigurable computing, computational genomics, and hardware security. He has given more than 110 invited talks sharing these research results worldwide. Dr. Chen is a technical committee member for a series of top conferences and symposia on EDA, FPGA, low-power design, and VLSI systems design. He has also served as General or TPC Chair, Track Chair, Session Chair, Panelist, Panel Organizer, or Moderator for some of these conferences. He obtained the Achievement Award for Excellent Teamwork from Aplus Design Technologies in 2001, the Arnold O. Beckman Research Award from UIUC in 2007, the NSF CAREER Award in 2008, and eight Best Paper Awards for ASPDAC'09, SASP'09, FCCM'11, SAAHPC'11, CODES+ISSS'13, ICCAD'15, SLIP'18, and ICCAD'18. He is included in the List of Teachers Ranked as Excellent in 2008 and 2017. He received the ACM SIGDA Outstanding New Faculty Award in 2010, and IBM Faculty Award in 2014 and 2015. In 2017, he led a team to win the first place of DAC International Hardware Design Contest in the IoT domain. He is the Donald Biggar Willett Faculty Scholar of College of Engineering, an IEEE Fellow, an ACM Distinguished Speaker, and the Editor-in-Chief of ACM Transactions on Reconfigurable Technology and Systems (TRETS).

  

SIST-Seminar 18159