• / Prof. Pingqiang Zhou / 周平强 助理教授、研究员
    电话:(021) 20685084
    Email: zhoupq@@shanghaitech.edu.cn
    办公室: 上海市浦东新区华夏中路393号信息学院1D-401D室
    专业方向: 电子科学与技术
Prof. Pingqiang Zhou / 周平强 助理教授、研究员

电 话:(021) 20685084
Email :zhoupq@@shanghaitech.edu.cn
办公室:上海市浦东新区华夏中路393号信息学院1D-401D室
个人主页: http://faculty.sist.shanghaitech.edu.cn/faculty/zhoupq/
专业方向: 电子科学与技术
周平强 研究组招聘广告(点击进入)

研究领域


  • 集成电路与系统的计算机辅助设计

  • 计算机系统架构

  • 机器学习




个人简历


周平强博士2007年获得(北京)清华大学计算机科学与技术的硕士学位,2012年获得美国明尼苏达大学电气工程的博士学位,毕业后留校从事博士后研究工作。周博士于2013年7月1日加入上海科技大学信息学院,任助理教授、研究员。他曾于2011年在纽约IBM T. J. Watson研究中心实习,并于2015年在加州大学伯克利分校做访问学者。

他曾获得清华大学优秀硕士论文奖以及明尼苏达大学博士论文奖学金。他在多核处理器的集成电压转换器上的创新性研究获得2011年国际定制集成电路会议(IEEE Custom Integrated Circuit Conference)的优秀学生论文奖学金;在三维多核处理器的通信网络上的研究成果获得亚太地区设计自动化会议(Asia/South Pacific Design Automation Conference)的最佳论文提名。” 周博士目前是集成电路计算机辅助设计(EDA)领域多个顶级期刊(如TCAD、TVLSI和TODAES等)的审稿人,同时担任EDA领域顶级会议DAC、ICCAD和ASP-DAC的程序委员会成员。



代表性论文

1.Li, Y., Zhuo, C., and Zhou, P. (2018). A Cross-Layer Framework for Temporal Power and Supply Noise Prediction. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

2.Gao, W., Qian, Z., and Zhou, P. (2018). Reliability-and performance-driven mapping for regular 3D NoCs using a novel latency model and Simulated Allocation. Integration.

3.Liu, Y., Chen, X., Kadambi, D., Bari, A., Li, X., Hu, S., and Zhou, P. (2018). Dependable Visual Light-Based Indoor Localization with Automatic Anomaly Detection for Location-Based Service of Mobile Cyber-Physical Systems. ACM Transactions on Cyber-Physical Systems, 3(1), 5.

4.Cai, X., Yin, J., and Zhou, P. (2018). An orchestrated NoC prioritization mechanism for heterogeneous CPU-GPU systems. Integration.

5.Liu, X., Sun, S., Li, X., Qian, H., & Zhou, P. (2017). Machine learning for noise sensor placement and full-chip voltage emergency detection. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36(3), 421-434.

6.Wang, L., & Zhou, P. (2016, March). Leakage power reduction in multicore chips via online decap modulation. In Semiconductor Technology International Conference (CSTIC), 2016 China (pp. 1-3). IEEE.

7.Zhou, P., Paul, A., Kim, C. H., & Sapatnekar, S. S. (2014). Distributed on-chip switched-capacitor DC–DC converters supporting DVFS in multicore systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 22(9), 1954-1967.

8.Yin, J., Zhou, P., Sapatnekar, S. S., & Zhai, A. (2014, May). Energy-efficient time-division multiplexed hybrid-switched noc for heterogeneous multicore systems. In Parallel and Distributed Processing Symposium, 2014 IEEE 28th International (pp. 293-303). IEEE.

9.Zhou, P., Yuh, P. H., & Sapatnekar, S. S. (2012). Optimized 3D network-on-chip design using simulated allocation. ACM Transactions on Design Automation of Electronic Systems (TODAES), 17(2), 12.

10.Zhou, P., Ma, Y., Li, Z., Dick, R. P., Shang, L., Zhou, H., ... & Zhou, Q. (2007, November). 3D-STAF: scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits. In Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design (pp. 590-597). IEEE Press.